To sustain CMOS transistor density scaling in accordance with Moore’s Law, the semiconductor industry has undergone a series of architectural transformations—from the 2D planar transistor to the FINFET architecture, and now toward nanosheet-based gate-all-around (GAA) transistors at the 3nm technology node. Looking ahead, complementary FET (CFET) architectures, which involve the vertical stacking of n-type and p-type transistors, are expected to emerge around 2030. These transitions are increasingly depending on the integration of novel materials, as traditional scaling approaches reach their physical and performance limits. For example, the increasing resistance-capacitance (RC) delay associated with scaled interconnects necessitates the exploration of copper replacement materials and alternative metallization schemes that can provide lower resistivity. Beyond the CFET era, the transistor channel might undergo a fundamental shift, with 2D-grown materials being actively investigated for their potential to enhance electrostatics and carrier transport in ultra-scaled nodes.
In parallel, memory technologies face their own scaling challenges. Traditional DRAM is approaching fundamental limits in capacitor and access transistor scaling, prompting the exploration of 3D DRAM architectures and new channel materials such as deposited semiconductor oxides. These approaches aim to enable higher density without sacrificing retention or speed. The field of emerging non-volatile memories—including ferroelectric RAM, and magnetoresistive RAM (MRAM)—is particularly dependent on material innovation.
This presentation will provide an insight in key materials innovations shaping the future of semiconductor devices. We will discuss both the opportunities and the integration challenges that must be addressed to translate these materials from laboratory research into manufacturable technologies.

Johan Swerts is currently serving as the director of the Materials-Interfaces and Deposition-Analysis (MIDA) department at imec since 2022. His department, comprising around 100 researchers and R&D engineers, focuses on developing novel materials and deposition processes for imec’s advanced 300mm silicon pilot line.

imec (Interuniversity Microelectronics Centre) is a leading international research and development organization specializing in nanoelectronics and digital technologies. Headquartered in Leuven, Belgium, imec was founded in 1984 and has since expanded globally. imec’s contributions are pivotal in advancing semiconductor technology, making chips more efficient and supporting applications across healthcare, automotive, and energy sectors. The organization continues to play a crucial role in Europe’s technological ecosystem, including leading initiatives under the European Chips Act.